Designing Digital Systems With SystemVerilog

Designing Digital Systems With SystemVerilog

Brent E. Nelson
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This textbook is for a university freshman/sophomore course on digital logic and digital systems design. In addition, the SystemVerilog language is interwoven throughout the text, providing both new learners as well as existing digital logic designers an introduction to the SystemVerilog language and its use for designing digital systems.

Digital design topics include: binary number representations and arithmetic, Boolean Algebra and truth tables, combinational logic circuits, logic minimization, latches and flip flops, registers, counters, state graphs, finite state machines, and FPGA devices.

SystemVerilog topics include: gate-level design, structural design, dataflow assignments, combinational and sequential always blocks and their use, the design of registers, counters, and finite state machines using SystemVerilog.

The book concludes with three fully worked SystemVerilog examples of digital designs: debouncing a switch, a soda machine controller, and a UART.

年:
2018
出版商:
Independently published
語言:
english
頁數:
340
ISBN 10:
1980926298
ISBN 13:
9781980926290
文件:
PDF, 5.63 MB
IPFS:
CID , CID Blake2b
english, 2018
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